Cortex M3 download issue

I have an issue when trying to download to a F28M35h52 Cortex M3 side I get "TI Driver Error -1268, PTI_ERR_CORE_LOCKED_UP (OTIS Error-1). Is there any trick in using the Cortex side? Also is ther any additional documentation for the Cortex Support as ther is nothing in the user guide?

Web Interface

Hi Anders, I have managed to to get the M3 side working, I can only get the compile & download to work if I turn the On Chip Ram & Target Flash, If these are on I either get compile errors or the error mentioned before. Do you have any documentation or tricks on using the Web Interface on the Cortex as I cannot see any of the web page code in the compile and I cannot ping the web page Ip address also not activity via my web browser. my NIC is in the same Ip range and the Cortex is running as I am flashing the leds to confirm.

Mike, attach your ARM Cortex

Mike, attach your ARM Cortex diagram so we can see what might be the issue. Usually you will have to target flash when using the web server block, since there is a large amount of code required to support Ethernet, TCP/IP and HTML page server, so it is unlikely that the code and data will fit in RAM alone. Please note that you will need to burn the flash using CCS.

Hi Where is the web page in

Hi Where is the web page in the generated code? There must be #include with the file name matching that of the code. If your code is in Diagram1.c, there will be #include "Diagram.h" The include file is not very human friendly though. All the files are in your code gen directory in VisSim. By default it is \cg. There is also index.htm - the source file to make the abovementioned include file. I assume that the web interface block in your diagram has some input/output pins. If so, there must be the data map table in the code. It looks similar to this:

tEthernetDatum varPool[4] = { {"i_w_0", ETM3_DOUBLE, (char**)&i_w_0}, {"i_w_1", ETM3_DOUBLE, (char**)&i_w_1}, {"o_w_0", ETM3_INT, (char**)&o_w_0}, {"o_w_1", ETM3_INT, (char**)&o_w_1} };

Also, there must be some set up instructions like

/* Enable and Reset the Ethernet Controller */ PrepareEnvironment(192, 9, 100, 169, 255, 255, 255, 0, 0xA8, 0x63, 0xF2, 0x00, 0x00, 0x80);

All this should be generated automatically. The ip address and subnet mask should be from your network address range. You provide them when you configure the web interface block. The board shoud respond to pings if the ethernet controller on it is properly configured. Finally, you can make your own simple web page first, like "Hello world!" without any data exchange and set up the web interface block so that it uses the existing web page.

Oops.. It turned out that it is not too easy to insert code in the comments

Yes, the Cortex M3 support is

Yes, the Cortex M3 support is still in Beta. There are a few tricks to downloading to the Cortex M3.

  1. Be sure to select the TI XDS100v3-M3 USB JTAG option
  2. Do not try to download to the target from VisSim when Code Composer has an active JTAG connection. The JTAG driver only supports one connection at a time.
  3. The Cortex can lock up if NMI (nonmaskable) interrupts are generated and no interrupt table has been established, or an NMI is generated while servicing an NMI. A power cycle on the target can help.
  4. The Cortex is the master on the Concerto, so you must make sure a working program is running on the Cortex before the C28 side can be used. For the Concerto, VisSim C28 support will automatically download a supplied setup_m2.out file to initialize the Cortex to a good state. You can supply your own .out file in the MCU Config... dialog.